Crystalline Oxides on Silicon

Silicon dioxide (SiO2) has been used as a gate insulator in field-effect transistors since the 1950s. In each new generation of technology, the thickness of this insulating layer has to be reduced. However, a significant problem arises when these insulator layers become very thin. As the layer thickness decreases, there is an exponential increase in direct tunnel current (leakage current). For instance, with a three nanometer thick SiO2 layer at one volt, you'd get a leakage current of about 10^-6 amperes per square centimeter. If you reduce the oxide thickness by a factor of two, the expected leakage current increases dramatically by six orders of magnitude, reaching around 0.5 amperes per square centimeter. This clearly shows that SiO2 won't be suitable as a gate insulator for ultra-small and ultra-fast transistors in the future. To address this issue and reduce leakage currents through the gate insulator without altering the transistor's switching behavior, new materials with a higher dielectric constant than SiO2 are required.

Currently, researchers worldwide are primarily focused on investigating amorphous high-k materials. These materials are highly ionic metal oxides with relatively low crystallization temperatures. When these temperatures are reached, they tend to form polycrystalline phases, which are unsuitable for use as gate insulators. This is primarily due to the high leakage currents that occur along the grain boundaries and the resulting increased surface roughness. For well-known high-k materials like HfO2 or ZrO2, these crystallization temperatures are typically surpassed during a CMOS process. While it's possible to take steps to raise the crystallization temperature (such as adding Si or Al), this approach is always a trade-off, as it tends to decrease the k value, limiting the achievable layer thickness. An alternative solution is to use epitaxially grown crystalline high-k materials, which eliminate the risk of subsequent crystallization. This approach significantly enhances thermal process stability. Additionally, it offers a well-defined interface with silicon, providing better opportunities for interface engineering. However, it's important to note that growing epitaxial high-k materials on silicon requires a degree of compatibility in terms of atomic spacing and lattice symmetry, limiting the range of suitable materials. Apart from various epitaxial perovskite structures, certain binary metal oxides, especially epitaxially grown binary rare-earth oxides (as seen in the figure), are considered potential candidates.

[Translate to English:] Diagramm der Gitterfehlanpassung verschiedener Selten-Erden-Oxide auf Silizium bzw. Germanium [Translate to English:] Diagramm der Gitterfehlanpassung verschiedener Selten-Erden-Oxide auf Silizium bzw. Germanium [Translate to English:] Diagramm der Gitterfehlanpassung verschiedener Selten-Erden-Oxide auf Silizium bzw. Germanium © MBE 2020
[Translate to English:] Gerenderte Einheitszelle von Gd2O3 [Translate to English:] Gerenderte Einheitszelle von Gd2O3 [Translate to English:] Gerenderte Einheitszelle von Gd2O3 © MBE 2020

The MBE Institute has dedicated several years to the epitaxial growth of crystalline rare-earth oxides on silicon substrates. Specifically, we have been employing gadolinium oxide (Gd2O3) and neodymium oxide (Nd2O3) as model systems. Both of these oxides share the same crystallographic structure, but there's a key difference: the lattice spacing of Gd2O3 is smaller than that of silicon, while that of Nd2O3 is larger than silicon's. Previously, ternary mixed layers of the form (Gd1-xNdx)2O3 (where x = 0 ...1), were grown directly on silicon. This allowed for controlling the lattice mismatch by adjusting the composition. As a result, valuable insights into how lattice strain influences the dielectric properties of these ternary layers were gained [1].

[1] D. Schwendt: Charakterisierung von binären und ternären Seltene Erden Oxiden, Dissertation, Gottfried-Wilhelm Leibniz Universität Hannover, 2012.